1 /*
2  * sys-emu - A system emulator for tutorials
3  * Copyright (C) 2018 - 2019 osdevelopment-info
4  *
5  * This program is free software: you can redistribute it and/or modify
6  * it under the terms of the GNU Affero General Public License as published by
7  * the Free Software Foundation, either version 3 of the License, or
8  * (at your option) any later version.
9  *
10  * This program is distributed in the hope that it will be useful,
11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  * GNU Affero General Public License for more details.
14  *
15  * You should have received a copy of the GNU Affero General Public License
16  * along with this program.  If not, see <https://www.gnu.org/licenses/>.
17  */
18 package info.osdevelopment.sysemu.processor.x86.i86
19 
20 import info.osdevelopment.sysemu.processor.{ProcessorDescriptor, Register}
21 import info.osdevelopment.sysemu.processor.x86.ProcessorX86
22 import scala.collection.mutable
23 import scala.util.{Failure, Success, Try}
24 
25 /**
26   * A concrete 8086 processor.
27   * @param descriptor the descriptor of the processor.
28   */
29 class Processor8086(override val descriptor: ProcessorDescriptor) extends ProcessorX86 (descriptor) {
30 
31   /**
32     * Thr registers of the 8086 processor.
33     */
34   private val _registers = mutable.Map[String, Int](
35     "AX" -> 0,
36     "BX" -> 0,
37     "CX" -> 0,
38     "DX" -> 0,
39     "DI" -> 0,
40     "SI" -> 0,
41     "BP" -> 0,
42     "SP" -> 0,
43     "FLAGS" -> 0,
44     "IP" -> 0,
45     "CS" -> 0xffff,
46     "DS" -> 0,
47     "ES" -> 0,
48     "SS" -> 0
49   )
50 
51   /**
52     * All registers of all cores when the cores are stopped.
53     *
54     * The result is Success if the cores can return the registers. When Failure is returned then the cores
55     * cannot return the registers at the moment, e.g. because any is running at the moment.
56     *
57     * The key of the map is the register name.
58     *
59     * @return A Try containing a Map with the core as key and a Map with the register name as key and the register as
60     *         value.
61     */
62   override def registers: Try[Map[Int, Map[String, Register]]] = {
63     Success(Map(0 -> internalRegisters))
64   }
65 
66   /**
67     * All registers of a core when the core is stopped.
68     *
69     * The result is Success if the core can return the registers. When Failure is returned then the core
70     * cannot return the registers at the moment, e.g. because it is running at the moment.
71     *
72     * The key of the map is the register name.
73     *
74     * @param core the core for which the registers should be queried. This parameter is ignored by this processor.
75     * @return A Try containing a Map with the register name as key and the register as value.
76     */
77   override def registers(core: Int): Try[Map[String, Register]] = {
78     Success(internalRegisters)
79   }
80 
81   /**
82     * Maps the internal registers to a register Map structure.
83     *
84     * @return a Map containing the register name as key and the register as value.
85     */
86   private def internalRegisters: Map[String, Register] = {
87     _registers.toMap.transform((name, content) => new Register(0, name, content, 16))
88   }
89 
90   /**
91     * Return the register with the given name of the given core, e.g. "AX".
92     *
93     * @param core the core for which the register should be returned. This parameter is ignored by this processor.
94     * @param name the name of the register to return
95     * @return the register named by name. Failure if the register does not exist or cannot be returned.
96     */
97   override def register(core: Int, name: String): Try[Register] = {
98     name match {
99       // first check for the 8bit-aliases
100       case "AH" | "AL" | "BH" | "BL" | "CH" | "CL" | "DH" | "DL" =>
101         get8BitRegister(name)
102       case _ =>
103         if (_registers.contains(name)) {
104           Success(new Register(0, name, BigInt(_registers(name).toShort), 16))
105         } else {
106           Failure(new IllegalArgumentException("The register " + name + " is not known by this processor."))
107         }
108     }
109   }
110 
111   /**
112     * Returns the content of an 8 bit register (AH, AL, BH, BL, CH, CL, DH or DL). This registers are part of the 16 bit
113     * registers AX, BX, CX or DX.
114     *
115     * @param name the 8 bit name of a register.
116     * @return the register addressed by name.
117     */
118   private def get8BitRegister(name: String): Try[Register] = {
119     val _16bitName = name.substring(0, 1) + "X"
120     name.charAt(1) match {
121       case 'H' =>
122         Success(new Register(0, name, BigInt(((_registers(_16bitName) >> 8) & 0xff).toShort), 8))
123       case 'L' =>
124         Success(new Register(0, name, BigInt((_registers(_16bitName) & 0xff).toShort), 8))
125       case _ =>
126         Failure(new IllegalArgumentException("The register " + name + " is not known by this processor."))
127     }
128   }
129 
130   /**
131     * Sets the register of the processor to the given content.
132     *
133     * The returned register (in case of Success(_)) contains the new register content. Failure is returned in case that
134     *  - the processor is running and therefore the register cannot be set
135     *  - the register is unknown to the processor
136     *  - the value of the register is invalid
137     *
138     * @param register the register to set
139     * @return Success with the new register value or Failure if the register cannot be set.
140     */
141   override def register(register: Register): Try[Register] = {
142     register.name match {
143       case "AH" | "AL" | "BH" | "BL" | "CH" | "CL" | "DH" | "DL" =>
144         set8BitRegister(register)
145       case _ =>
146         if (_registers.contains(register.name)) {
147           set16BitRegister(register)
148         } else {
149           Failure(new IllegalArgumentException("The register " + name + " is not known by the processor."))
150         }
151     }
152   }
153 
154   /**
155     * Sets the contents of the 8 bit register (AH, AL, BH, BL, CH, CL, DH or DL) to the value given in register. This
156     * registers are part of the 8 bit registers AX, BX, CX or DX.
157     *
158     * @param register the register to set.
159     * @return the new register.
160     */
161   private def set8BitRegister(register: Register): Try[Register] = {
162     if (register.content <= 255 & register.content >= -128) {
163       val _16bit = register.name.substring(0, 1) + "X"
164       register.name.charAt(1) match {
165         case 'H' =>
166           _registers(_16bit) = (_registers(_16bit) & 0x00ff) | ((register.content & 0xff) << 8).toShort
167         case 'L' =>
168           _registers(_16bit) = (_registers(_16bit) & 0xff00) | (register.content & 0xff).toShort
169       }
170       this.register(0, register.name)
171     } else {
172       Failure(new IllegalArgumentException("The register " + name + " is not known by this processor."))
173     }
174   }
175 
176   /**
177     * Sets the contents of the 16 bit register to the value given in register.
178     *
179     * @param register the register with the new content.
180     * @return the new register.
181     */
182   private def set16BitRegister(register: Register): Try[Register] = {
183     if (register.content <= 65535 & register.content >= -32768) {
184       _registers(register.name) = (register.content & 0xffff).toShort
185       this.register(0, register.name)
186     } else {
187       Failure(new IllegalArgumentException("The register " + name + " is not known by this processor."))
188     }
189   }
190 
191   /**
192     * Calculates the start address for a ROM/BIOS based on the size. The start address may be constant or dynamic
193     * depending on the size (e.g. for x86). The start address is not necessarily the start address for the processor.
194     * The start address is None if the ROM/BIOS is too large for the processor.
195     * @return the start address for the ROM/BIOS depending on the architecture
196     */
197   override def calculateRomStart(romSize: Long): Option[Long] = {
198     if (romSize < 16) {
199       Some(0xffff0)
200     } else if (romSize < maxMemory) {
201       Some(maxMemory - romSize)
202     } else {
203       None
204     }
205   }
206 
207   /**
208     * Resets the processor and starts it new.
209     */
210   override def reset(): Unit = {
211     _registers.mapValuesInPlace((name, _) => {
212       name match {
213         case "CS" => 0xffff
214         case _ => 0
215       }
216     })
217   }
218 
219   /**
220     * Do a single step of the processor (normally execute the next instruction).
221     */
222   override def step(): Unit = {
223   }
224 
225 }